Field of the Disclosure
The present invention relates generally to image sensors. More specifically, examples of the present invention are related to circuits that read out image data from image sensor pixel cells.
Background
Image sensors have become ubiquitous. They are widely used in digital cameras, cellular phones, security cameras, as well as, medical, automobile, and other applications. The technology used to manufacture image sensors, and in particular, complementary metal-oxide-semiconductor (CMOS) image sensors, has continued to advance at a great pace. For example, the demands for higher resolution and lower power consumption have encouraged the further miniaturization and integration of CMOS image sensors.
In CMOS image sensors, performance factors such as horizontal noise (h-noise), circuit power supply rejection ratio (PSRR), power consumption, etc., have been key parameters in which efforts have been made for improvement in recent years. Since human vision is especially sensitive to horizontal banding/noise in images, enormous efforts have been made to reduce this type of noise. Specifically, with regard to the most popular image sensor readout structures, column-wise analog to digital converters tend to generate large amounts of horizontal noise because the ramp generators are row-wise signals. Consequently, any noise in the ramp generator ramp outputs lead to different row-by-row readout performance. Similarly, due to the nature of single-ended ramp generators, power supply rejection ratio is also an important factor to be considered. An insufficient power supply rejection ratio will cause image horizontal banding due to ripple in the analog power supply.
Another concern with image sensor chips is the analog power consumption. A typical analog power supply for a state-of-the-art image sensor is around 2.8 V. This high analog VDD voltage is necessary in order for pixels to output full well signals. However, with image pixels being developed in a more aggressive fashion, smaller size pixels also have a lower full well requirement. As a result, compared to previous image pixels, a ˜1 V, ˜500 mV, or an even lower pixel output range is sufficient. Under these circumstances with lower pixel output ranges, a lower analog VDD supply voltage is a trend in future image sensor designs where power consumption is greatly reduced. Accordingly, readout circuitries also need to accommodate this lower analog VDD supply voltage trend, while still maintaining the same low noise performance.
Corresponding reference characters indicate corresponding components throughout the several views of the drawings. Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of various embodiments of the present invention. Also, common but well-understood elements that are useful or necessary in a commercially feasible embodiment are often not depicted in order to facilitate a less obstructed view of these various embodiments of the present invention.